⎯
104
⎯
6 F 2 S 0 8 4 6
where,
V = fault voltage
I = fault current
Zs = zone reach setting
Zso = offset zone reach setting
Figure 2.5.1.7 is a voltage diagram showing the offset mho characteristics obtained by the phase
comparison between S1 and S2.
The offset mho characteristic on the impedance plane is obtained by dividing the voltage in Figure
2.5.1.7 by current I.
R
V
−
IZso
IZs
S2 = V
+
IZso
S1 = V
−
IZs
X
Figure 2.5.1.7 Offset Mho Element
Reactance element
The reactance elements of Z1 and Z1X have a composite characteristic with the two straight lines,
one is parallel and the other is gradual descent toward the R-axis as shown in Figure 2.5.1.8.
The characteristic is defined by the reach setting Xs and the angle settings
θ
1 and
θ
2. This
composite characteristic is obtained only when the load current is transmitted from local to remote
terminal. When the load current flows from remote to local terminal or the load current does not
flow or
θ
1 is set to 0
°
, the reactance element characteristic is a horizontal line which is parallel to
the R-axis.
The characteristic is expressed by the following equations.
For horizontal characteristic
X
≤
Xs
For gradient characteristic
R
≤
Xs tan ( 90
°
−
θ
2 )
+
( Xs
−
X ) tan ( 90
°
−
θ
1 )
where,
R = resistance component of measured impedance
X = reactance component of measured impedance
Xs = reach setting
The reactance element characteristic of Z2, ZF and ZR1 is given by a parallel line to the R axis.
R and X are calculated using an integration approximation algorithm. The reactance element
provides high measurement accuracy even in the presence of power system frequency fluctuations
and distorted transient waveforms containing low-frequency spectral components.
Summary of Contents for GRZ100 B Series
Page 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Page 271: ... 270 6 F 2 S 0 8 4 6 ...
Page 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Page 307: ... 306 6 F 2 S 0 8 4 6 ...
Page 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Page 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Page 321: ... 320 6 F 2 S 0 8 4 6 ...
Page 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Page 331: ... 330 6 F 2 S 0 8 4 6 ...
Page 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Page 377: ... 376 6 F 2 S 0 8 4 6 ...
Page 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Page 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Page 389: ... 388 6 F 2 S 0 8 4 6 ...
Page 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Page 401: ... 400 6 F 2 S 0 8 4 6 ...
Page 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Page 405: ... 404 6 F 2 S 0 8 4 6 ...
Page 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Page 417: ... 416 6 F 2 S 0 8 4 6 ...
Page 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Page 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Page 437: ... 436 6 F 2 S 0 8 4 6 ...
Page 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Page 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Page 447: ......