⎯
71
⎯
6 F 2 S 0 8 4 6
The alarming and tripping can be disabled by the scheme switches [THMAL] and [THMT]
respectively or binary input signals THMA_BLOCK and THM_BLOCK.
&
THM_ALARM
+
"ON"
[THMAL]
+
"ON"
[THMT]
THM_TRIP
&
T
A
THM
1
THMA_BLOCK
1615
1
THM_BLOCK
1631
560
556
690
691
Figure 2.4.6.2 Thermal Overload Protection Scheme Logic
Setting
The table below shows the setting elements necessary for the thermal overload protection and their
setting ranges.
Element Range
Step
Default Remarks
THM
2.0 – 10.0 A
(0.40 – 2.00 A)(*)
0.1 A
(0.01 A)
5.0 A
(1.00 A)
Thermal overload setting.
(THM = I
AOL
: allowable overload current)
THMIP
0.0 – 5.0 A
(0.00 – 1.00 A)(*)
0.1 A
(0.01 A)
0.0 A
(0.00 A)
Previous load current
TTHM
0.5 - 300.0 min
0.1 min
10.0 min
Thermal time constant
THMA
50 – 99 %
1 %
80 %
Thermal alarm setting. (Percentage of THM setting.)
[THMT]
Off / On
Off
Thermal OL enable
[THMAL]
Off / On
Off
Thermal alarm enable
(*) Current values shown in the parenthesis are in the case of a 1 A rating. Other current
values are in the case of a 5 A rating.
Note: THMIP sets a minimum level of previous load current to be used by the thermal
element, and is only active when testing ([THMRST] = “ON”).
Summary of Contents for GRZ100 B Series
Page 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Page 271: ... 270 6 F 2 S 0 8 4 6 ...
Page 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Page 307: ... 306 6 F 2 S 0 8 4 6 ...
Page 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Page 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Page 321: ... 320 6 F 2 S 0 8 4 6 ...
Page 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Page 331: ... 330 6 F 2 S 0 8 4 6 ...
Page 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Page 377: ... 376 6 F 2 S 0 8 4 6 ...
Page 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Page 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Page 389: ... 388 6 F 2 S 0 8 4 6 ...
Page 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Page 401: ... 400 6 F 2 S 0 8 4 6 ...
Page 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Page 405: ... 404 6 F 2 S 0 8 4 6 ...
Page 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Page 417: ... 416 6 F 2 S 0 8 4 6 ...
Page 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Page 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Page 437: ... 436 6 F 2 S 0 8 4 6 ...
Page 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Page 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Page 447: ......