ML51/ML54/ML56
Sep. 01, 2020
Page
289
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Rev 2.00
ML
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/ML
54
/ML
5
6 S
E
RI
E
S
TECHNI
CA
L
RE
F
E
R
E
NC
E
M
A
NU
A
L
ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
EIPH1
– Extensive Interrupt Priority High 1
Register
SFR Address
Reset Value
EIPH1
FFH, Page 0
0000_0000 b
7
6
5
4
3
2
1
0
PSPI1H
PDMA1H
PDMA0H
PSMCH
PHFH
PWKTH
PT3H
PS1H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
[7]
PSPI1H
SPI1 interrupt priority high bit
[6]
PDMA1H
PDMA1 interrupt priority high bit
[5]
PDMA0H
PDMA0 interrupt priority high bit
[4]
PSMCH
SMC interrupt priority high bit
[3]
PHFH
Hard fault interrupt priority high bit
[2]
PWKTH
WKT interrupt priority high bit
[1]
PT3H
Timer 3 interrupt priority high bit
[0]
PS1H
Serial port 1 interrupt priority high bit
Note:
EIPH1 is used in combination with the EIP1 to determine the priority of each interrupt source. See Table 6.2-5
Interrupt Priority Level Setting for correct interrupt priority configuration.
