ML51/ML54/ML56
Sep. 01, 2020
Page
179
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Rev 2.00
ML
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54
/ML
5
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TECHNI
CA
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F
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NC
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M
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NU
A
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
PWMnINTC
– PWM Interrupt Control
Register
SFR Address
Reset Value
PWM0INTC
B7H, Page 1
0000_0000 b
PWM1INTC
9EH, Page 2
0000_0000 b
PWM2INTC
C6H, Page 2
0000_0000 b
PWM3INTC
D6H, Page 2
0000_0000 b
7
6
5
4
3
2
1
0
-
-
INTTYP1
INTTYP0
-
INTSEL2
INTSEL1
INTSEL0
-
-
R/W
R/W
-
R/W
R/W
R/W
Bit
Name
Description
[7:6]
-
Reserved
[5:4]
INTTYP[1:0]
PWM Interrupt Type Select
These bit select PWM interrupt type.
00 = Falling edge on PWMn_CH0/1/2/3/4/5 pin.
01 = Rising edge on PWMn_CH0/1/2/3/4/5 pin.
10 = Central point of a PWM period.
11 = End point of a PWM period.
Note that the central point interrupt or the end point interrupt is only available while PWM
operates in center-aligned type.
[3]
-
Reserved
[2:0]
INTSEL[2:0]
PWM Interrupt Pair Select
These bits select which PWM channel asserts PWM interrupt when PWM interrupt type is
selected as falling or rising edge on PWM0/1/2/3/4/5 pin..
000 = PWMn_CH0.
001 = PWMn_CH1.
010 = PWMn_CH2.
011 = PWMn_CH3.
100 = PWMn_CH4.
101 = PWMn_CH5.
Others = PWMn_CH0.
