ML51/ML54/ML56
Sep. 01, 2020
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Rev 2.00
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
WDCON
– Watchdog Timer Control (TA Protected)
Register
SFR Address
Reset Value
WDCON
AAH, Page 0, TA protected
POR 0000_0111 b
WDT 0000_1UUU b
Others 0000_UUUU b
7
6
5
4
3
2
1
0
WDTR
WDCLR
WDTF
WIDPD
WDTRF
WDPS[2:0]
R/W
R/W
R/W
R/W
R/W
R/W
Address: AAH, Page 0
Reset value: POR: 0000 0111b / WDT: 0000 1UUUb / Others: 0000 UUUUb
Bit
Name
Description
[3]
WDTRF
WDT Reset Flag
When the CPU is reset by WDT time-out event, this bit will be set via hardware. This flag is
recommended to be cleared via software after reset.
