ML51/ML54/ML56
Sep. 01, 2020
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Rev 2.00
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
IAPUEN
– IAP Updating Enable (TA Protected)
Register
SFR Address
Reset Value
IAPUEN
A5H, Page 0, TA protected
0000 _0000 b
7
6
5
4
3
2
1
0
-
-
-
SPMEN
SPUEN
CFUEN
LDUEN
APUEN
-
-
-
R/WFV
R/W
R/W
R/W
R/W
Bit
Name
Description
[7:5]
-
Reserved
[4]
SPMEN
SPROM Memory Space Mapping Enable
0 = CPU memory address 0xff80~0xffff is mapping to APROM memory
1 = CPU memory address 0xff80~0xffff is mapping to SPROM memory
[3]
SPUEN
SPROM Memory Space Updated Enable(TA Protected)
0 = Inhibit erasing or programming SPRO Mbytes by IAP
1 = Allow erasing or programming SPRO Mbytes by IAP.
[2]
CFUEN
CONFIG Bytes Updated Enable
0 = Inhibit erasing or programming CONFIG bytes by IAP.
1 = Allow erasing or programming CONFIG bytes by IAP.
[1]
LDUEN
LDROM Updated Enable
0 = Inhibit erasing or programming LDROM by IAP.
1 = Allow erasing or programming LDROM by IAP.
[0]
APUEN
APROM Updated Enable
0 = Inhibit erasing or programming APROM by IAP.
1 = Allow erasing or programming APROM by IAP.
