ML51/ML54/ML56
Sep. 01, 2020
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Rev 2.00
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TECHNI
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
BODCON1
– Brown-out Detection Control Byte 1 (TA Protected)
Register
SFR Address
Reset Value
BODCON1
ABH, Page 0, TA protected
POR 0000 0001 b
Others 0000 0UUU b
7
6
5
4
3
2
1
0
-
-
-
-
-
LPBOD[1:0]
BODFLT
-
-
-
-
-
R/W
R/W
Bit
Name
Description
[7:3]
-
Reserved
[2:1]
LPBOD[1:0]
Low Power BOD Enable
00 = BOD normal mode. BOD circuit is always enabled.
01 = BOD low power mode 1 by turning on BOD circuit every 1.6 ms periodically.
10 = BOD low power mode 2 by turning on BOD circuit every 6.4 ms periodically.
11 = BOD low power mode 3 by turning on BOD circuit every 25.6 ms periodically.
[0]
BODFLT
BOD Filter Control
BOD has a filter which counts 32 clocks of F
SYS
to filter the power noise when MCU runs
with HIRC, or ECLK as the system clock and BOD does not operates in its low power mode
(LPBOD[1:0] = [0, 0]). In other conditions, the filter counts 2 clocks of LIRC.
Note that when CPU is halted in Power-down mode. The BOD output is permanently
filtered by 2 clocks of LIRC.
The BOD filter avoids the power noise to trigger BOD event. This bit controls BOD filter
enabled or disabled.
0 = BOD filter Disabled.
1 = BOD filter Enabled. (Power-on reset default value.)
