ML51/ML54/ML56
Sep. 01, 2020
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Rev 2.00
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
SPInDR
– Serial Peripheral Data Register
Register
SFR Address
Reset Value
SPI0DR
F5H, Page 0
0000_0000 b
SPI1DR
FCH, Page 0
0000_0000 b
7
6
5
4
3
2
1
0
SPInDR[7:0]
R/W
Bit
Name
Description
[7:0]
SPInDR[7:0]
Serial Peripheral Data
This byte is used for transmitting or receiving data on SPI bus. A write of this byte is a write
to the shift register. A read of this byte is actually a read of the read data buffer. In Master
mode, a write to this register initiates transmission and reception of a byte simultaneously.