ML51/ML54/ML56
Sep. 01, 2020
Page
489
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Rev 2.00
ML
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54
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5
6 S
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RI
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TECHNI
CA
L
RE
F
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R
E
NC
E
M
A
NU
A
L
ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
S1CON
– Serial Port 1 Control
Register
SFR Address
Reset Value
S1CON
F8H, All pages, Bit addressable
0000_0000 b
7
6
5
4
3
2
1
0
SM0_1/FE_1
SM1_1
SM2_1
REN_1
TB8_1
RB8_1
TI_1
RI_1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
[7]
SM0_1/FE_1
Serial Port 1 Mode Select
SMOD0_1 (T3CON.6) = 0:
See Table 6.9-2 Serial Port 1 Mode / baud rate Description
for details.
SMOD0_1 (T3CON.6) = 1:
SM0_1/FE_1 bit is used as frame error (FE) status flag. It is cleared by software.
0 = Frame error (FE) did not occur.
1 = Frame error (FE) occurred and detected.
[6]
SM1_1
Check with bit 7 description.
[5]
SM2_1
Multiprocessor Communication Mode Enable
The function of this bit is dependent on the serial port 1 mode.
Mode 0:
No effect.
Mode 1:
This bit checks valid stop bit.
0 = Reception is always valid no matter the logic level of stop bit.
1 = Reception is valid only when the received stop bit is logic 1 and the received data
matches “Given” or “Broadcast” address.
Mode 2 or 3:
For multiprocessor communication.
0 = Reception is always valid no matter the logic level of the 9
th
bit.
1 = Reception is valid only when the received 9th bit is logic 1 and the received data
matches “Given” or “Broadcast” address.
[4]
REN_1
Receiving Enable
0 = Serial port 1 reception Disabled.
1 = Serial port 1 reception Enabled in Mode 1,2, or 3. In Mode 0, reception is initiated by the
condition REN_1 = 1 and RI_1 = 0.
[3]
TB8_1
9
th
Transmitted Bit
This bit defines the state of the 9
th
transmission bit in serial port 1 Mode 2 or 3. It is not used
in Mode 0 or 1.
