ML51/ML54/ML56
Sep. 01, 2020
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Rev 2.00
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
PWM0NP
– PWM Negative Polarity
Register
SFR Address
Reset Value
PWM0NP
D6H, Page 1
0000_0000 b
7
6
5
4
3
2
1
0
-
-
PNP5
PNP4
PNP3
PNP2
PNP1
PNP0
-
-
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
[5:0]
PNPn
PWMn Negative Polarity Output Enable
0 = PWMn signal outputs directly on PWMn pin.
1 = PWMn signal outputs inversely on PWMn pin.
6.8.5
PWM Interrupt
The PWM module has a flag PWMF (PWMnCON0.5) to indicate certain point of each complete PWM
period. The indicating PWM channel and point can be selected by INTSEL[2:0] and INTTYP[1:0]
(PWMnINTC[2:0] and [5:4]). Note that the center point and the end point interrupts are only available
when PWM operates in its center-aligned type. PWMF is cleared by software.