ML51/ML54/ML56
Sep. 01, 2020
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ML51/M
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Series
Tec
hnical Reference
Manual
6.2.2
Power Management
The ML51/ML54/ML56 Series has several features that help user to control the power consumption of
the device. Table 6.2-1 Table 6.2-1 Power Mode Tablelists all power mode at ML51/ML54/ML56
Series to save the power consumption. For a stable current consumption, the state and mode of each
pin should be taken care of. The minimum power consumption can be attained by giving the pin state
just the same as the external pulls for example output 1 if pull-high is used or output 0 if pull-low. If the
I/O pin is floating, user is recommended to leave it as quasi-bidirectional mode.
Mode
Clock Source
Comment
Normal mode
Any clock source
-
Idle mode
Any clock source
Only CPU clock is stoped.
Low power run mode
Only for LIRC or LXT
-
Low power idle mode
Only for LIRC or LXT
Only CPU clock is stoped.
Power-down mode (PD)
Any clock source
1. CPU enters deep sleep mode
2. Most clocks are disabled except ACMP/LIRC/LXT, and only
WDT/WKT peripheral clocks still enable if their clock sources are
selected as LIRC/LXT.
Table 6.2-1 Power Mode Table
For each power mode, they have different entry setting and leaving condition. The Table 6.2-2 shows
the entry setting for each power mode. When chip power-on, chip is running in normal mode. User can
enter each mode by setting IDL (PCON.0), LPR (PCON.5) and PD (PCON.1).
Register/Instruction Mode
LPR (PCON.5)
PD (PCON.1)
IDL (PCON.0)
Normal mode
0
0
0
Idle mode
0
0
1
Low power run mode
1
0
0
Low power idle mode
1
0
1
Power-down mode
X
1
X
Table 6.2-2 Entry setting of Power-down mode
