ML51/ML54/ML56
Sep. 01, 2020
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Rev 2.00
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TECHNI
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
WKCON
– Self Wake-up Timer Control
Register
SFR Address
Reset Value
WKCON
8FH, Page 0
0000_0000b
7
6
5
4
3
2
1
0
-
-
WKTCK
WKTF
WKTR
WKPS[2:0]
-
-
R/W
R/W
R/W
R/W
Bit
Name
Description
[7:6]
-
Reserved
[5]
WKTCK
WKT Clock Source
This bit is set WKT clock source select bit.
0 = LIRC
1 = LXT
[4]
WKTF
WKT Overflow Flag
This bit is set when WKT overflows. If the WKT interrupt and the global interrupt are
enabled, setting this bit will make CPU execute WKT interrupt service routine. This bit is not
automatically cleared via hardware and should be cleared via software.
[3]
WKTR
WKT Run Control
0 = WKT is halted.
1 = WKT starts running.
Note that the reload register RWK can only be written when WKT is halted (WKTR bit is 0).
If WKT is written while WKTR is 1, result is unpredictable.
[2:0]
WKPS[2:0]
WKT Pre-Scalar
These bits determine the pre-scale of WKT clock.
000 = 1/1.
001 = 1/4.
010 = 1/16.
011 = 1/64.
100 = 1/256.
101 = 1/512.
110 = 1/1024.
111 = 1/2048.