ML51/ML54/ML56
Sep. 01, 2020
Page
487
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Rev 2.00
ML
51
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54
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5
6 S
E
RI
E
S
TECHNI
CA
L
RE
F
E
R
E
NC
E
M
A
NU
A
L
ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
SCON
– Serial Port Control
Register
SFR Address
Reset Value
SCON
98H, All pages, Bit addressable
0000_0000 b
7
6
5
4
3
2
1
0
SM0/FE
SM1
SM2
REN
TB8
RB8
TI
RI
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
[7]
SM0/FE
Serial Port Mode Select
SMOD0 (PCON.6) = 0:
See Table 6.9-1 Serial Port 0 Mode / baud rate Description for details.
SMOD0 (PCON.6) = 1:
SM0/FE bit is used as frame error (FE) status flag. It is cleared by software.
0 = Frame error (FE) did not occur.
1 = Frame error (FE) occurred and detected.
[6]
SM1
Check with bit 7 description.
[5]
SM2
Multiprocessor Communication Mode Enable
The function of this bit is dependent on the serial port 0 mode.
Mode 0:
This bit select the baud rate between FSYS/12 and FSYS/2.
0 = The clock runs at FSYS/12 baud rate. It maintains standard 8051compatibility.
1 = The clock runs at FSYS/2 baud rate for faster serial communication.
Mode 1:
This bit checks valid stop bit.
0 = Reception is always valid no matter the logic level of stop bit.
1 = Reception is valid only when the received stop bit is logic 1 and the received data matches
“Given” or “Broadcast” address.
Mode 2 or 3:
For multiprocessor communication.
0 = Reception is always valid no matter the logic level of the 9th bit.
1 = Reception is valid only when the received 9th bit is logic 1 and the received data matches
“Given” or “Broadcast” address.
[4]
REN
Receiving Enable
0 = Serial port 0 reception Disabled.
1 = Serial port 0 reception Enabled in Mode 1,2, or 3. In Mode 0, reception is initiated by the
condition REN = 1 and RI = 0.
[3]
TB8
9th Transmitted Bit
This bit defines the state of the 9th transmission bit in serial port 0 Mode 2 or 3. It is not used in
Mode 0 or 1.