ML51/ML54/ML56
Sep. 01, 2020
Page
228
of 719
Rev 2.00
ML
51
/ML
54
/ML
5
6 S
E
RI
E
S
TECHNI
CA
L
RE
F
E
R
E
NC
E
M
A
NU
A
L
ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
PWM0NP
– PWM Negative Polarity
Register
SFR Address
Reset Value
PWM0NP
D6H, Page 1
0000_0000 b
7
6
5
4
3
2
1
0
-
-
PNP5
PNP4
PNP3
PNP2
PNP1
PNP0
-
-
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
[5:0]
PNPn
PWMn Negative Polarity Output Enable
0 = PWMn signal outputs directly on PWMn pin.
1 = PWMn signal outputs inversely on PWMn pin.