ML51/ML54/ML56
Sep. 01, 2020
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458
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Rev 2.00
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TECHNI
CA
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F
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NC
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ML51/M
L54
/M
L56
Series
Tec
hnical Reference
Manual
The PWM interrupt related with PWM waveform is shown as figure below.
Reserved
PWMF (central point)
(INTTYP[1:0] = [1:0])
PWMF (end point)
(INTTYP[1:0] = [1:1])
Central point
End point
PWM channel 0/2/4
pin output
Software
clear
12-bit PWM counter
Dead time
PWMF (falling edge)
(INTTYP[1:0] = [0:0])
PWMF (rising edge)
(INTTYP[1:0] = [0:1])
Edge-aligned PWM
Center-aligned PWM
Reserved
Figure 6.8-9 PWM Interrupt Type
Fault Brake event requests another interrupt, Fault Brake interrupt. It has different interrupt vector from
PWM interrupt. When either Fault Brake pin input event or ADC compare event occurs, FBF
(PWMnFBD.7) will be set by hardware. It generates Fault Brake interrupt if enabled. The Fault Brake
interrupt enable bit is EFB0 (EIE0.5). FBF Is cleared via software.