ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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PWM Interrupt Flag Register 0 (PWM_INTSTS0)
Register
Offset
R/W Description
Reset Value
PWM_INTSTS0
0xE8
R/W PWM Interrupt Flag Register 0
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
CMPDIF5
CMPDIF4
CMPDIF3
CMPDIF2
CMPDIF1
CMPDIF0
23
22
21
20
19
18
17
16
Reserved
CMPUIF5
CMPUIF4
CMPUIF3
CMPUIF2
CMPUIF1
CMPUIF0
15
14
13
12
11
10
9
8
Reserved
PIF5
PIF4
PIF3
PIF2
PIF1
PIF0
7
6
5
4
3
2
1
0
Reserved
ZIF5
ZIF4
ZIF3
ZIF2
ZIF1
ZIF0
Bits
Description
[31:30]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[29]
CMPDIF5
PWM Channel 4 Compare Down Count Interrupt Flag
Flag is set by hardware when PWM counter down count and reaches PWM_CMPDAT5,
software can clear this bit by writing 1 to it.
Note1:
If CMPDAT equal to PERIOD, this flag is not working in down counter type selection.
Note2:
In complementary mode, CMPDIF1, 3, 5 use as another CMPDIF for channel 0, 2,
4.
[28]
CMPDIF4
PWM Channel 4 Compare Down Count Interrupt Flag
Flag is set by hardware when PWM counter down count and reaches PWM_CMPDAT4,
software can clear this bit by writing 1 to it.
Note1:
If CMPDAT equal to PERIOD, this flag is not working in down counter type selection.
Note2:
In complementary mode, CMPDIF1, 3, 5 use as another CMPDIF for channel 0, 2,
4.
[27]
CMPDIF3
PWM Channel 3 Compare Down Count Interrupt Flag
Flag is set by hardware when PWM counter down count and reaches PWM_CMPDAT3,
software can clear this bit by writing 1 to it.
Note1:
If CMPDAT equal to PERIOD, this flag is not working in down counter type selection.
Note2:
In complementary mode, CMPDIF1, 3, 5 use as another CMPDIF for channel 0, 2,
4.
[26]
CMPDIF2
PWM Channel 2 Compare Down Count Interrupt Flag
Flag is set by hardware when PWM counter down count and reaches PWM_CMPDAT2,
software can clear this bit by writing 1 to it.
Note1:
If CMPDAT equal to PERIOD, this flag is not working in down counter type selection.
Note2:
In complementary mode, CMPDIF1, 3, 5 use as another CMPDIF for channel 0, 2,
4.
[25]
CMPDIF1
PWM Channel 1 Compare Down Count Interrupt Flag
Flag is set by hardware when PWM counter down count and reaches PWM_CMPDAT1,
software can clear this bit by writing 1 to it.