ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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ISP Multi-Program Status Register (FMC_MPSTS)
Register
Offset
R/W Description
Reset Value
FMC_MPSTS
0xC0
R
ISP Multi-Word Program Status Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
D3
D2
D1
D0
Reserved
ISPFF
PPGO
MPBUSY
Bits
Description
[31:8]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[7]
D3
ISP DATA 3 Flag (Read Only)
This bit is set when FMC_MPDAT3 is written and auto-clear to 0 when the FMC_MPDAT3
data is programmed to flash complete.
0 = FMC_MPDAT3 register is empty, or program to flash complete.
1 = FMC_MPDAT3 register has been written, and not program to flash complete.
[6]
D2
ISP DATA 2 Flag (Read Only)
This bit is set when FMC_MPDAT2 is written and auto-clear to 0 when the FMC_MPDAT2
data is programmed to flash complete.
0 = FMC_MPDAT2 register is empty, or program to flash complete.
1 = FMC_MPDAT2 register has been written, and not program to flash complete.
[5]
D1
ISP DATA 1 Flag (Read Only)
This bit is set when FMC_MPDAT1 is written and auto-clear to 0 when the FMC_MPDAT1
data is programmed to flash complete.
0 = FMC_MPDAT1 register is empty, or program to flash complete.
1 = FMC_MPDAT1 register has been written, and not program to flash complete.
[4]
D0
ISP DATA 0 Flag (Read Only)
This bit is set when FMC_MPDAT0 is written and auto-clear to 0 when the FMC_MPDAT0
data is programmed to flash complete.
0 = FMC_MPDAT0 register is empty, or program to flash complete.
1 = FMC_MPDAT0 register has been written, and not program to flash complete.
[3]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.