ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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Timer PWM Period Register (TIMERx PWMPERIOD)
Register
Offset
R/W Description
Reset Value
TIMER0_PWMPERIOD
T0x50
R/W Timer0 PWM Period Register
0x0000_0000
TIMER1_PWMPERIOD
T0x150
R/W Timer1 PWM Period Register
0x0000_0000
TIMER2_PWMPERIOD
T0x50
R/W Timer2 PWM Period Register
0x0000_0000
TIMER3_PWMPERIOD
T0x150
R/W Timer3 PWM Period Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
PERIOD
7
6
5
4
3
2
1
0
PERIOD
Bits
Description
[31:16]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[15:0]
PERIOD
PWM Period Register
In up count type: PWM counter counts from 0 to PERIOD, and restarts from 0.
In down count type: PWM counter counts from PERIOD to 0, and restarts from PERIOD.
In up-down count type: PWM counter counts from 0 to PERIOD, then decrements to 0 and
repeats again.
In up and down count type:
PWM period time = ( 1) * ( 1) * TMRx_PWMCLK.
In up-down count type:
PWM period time = 2 * PERIOD * ( 1) * TMRx_PWMCLK.
Note:
User should take care DIRF (TIMERx_PWMCNT[16]) bit in up/down/up-down count
type to monitor current counter direction in each count type.