ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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Timer Interrupt Status Register (TIMERx_INTSTS)
Register
Offset
R/W Description
Reset Value
TIMER0_INTSTS
T0x08
R/W Timer0 Interrupt Status Register
0x0000_0000
TIMER1_INTSTS
T0x108
R/W Timer1 Interrupt Status Register
0x0000_0000
TIMER2_INTSTS
T0x08
R/W Timer2 Interrupt Status Register
0x0000_0000
TIMER3_INTSTS
T0x108
R/W Timer3 Interrupt Status Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
TWKF
TIF
Bits
Description
[31:2]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[1]
TWKF
Timer Wake-up Flag
This bit indicates the interrupt wake-up flag status of timer.
0 = Timer does not cause CPU wake-up.
1 = CPU wake-up from Power-down mode if timer time-out interrupt signal generated.
Note:
This bit is cleared by writing 1 to it.
[0]
TIF
Timer Interrupt Flag
This bit indicates the interrupt flag status of Timer while 24-bit timer up counter CNT
(TIMERx_CNT[23:0]) value reaches to CMPDAT (TIMERx_CMP[23:0]) value.
0 = No effect.
1 = CNT value matches the CMPDAT value.
Note:
This bit is cleared by writing 1 to it.