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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
C16X Microcontroller
4 - 23
Micronas
• Addresses 00’0000
H
... 3F’FFFF
H
access the first static memory device (CSROM)
• Addresses 40’0000
H
... 7F’FFFF
H
access the second static memory device (CS3)
The addresses shown on the external address lines of M2 are word oriented,
starting at 0 for each device.
The External Bus Interface (EBI) provides a special mode, the “EBI direct mode”, where
the control pins to the SDRAM device are directly controlled by the CPU while the HW
finite state machines of the EBI are bypassed. “EBI direct mode” is used for
accomplishing operations on the SDRAM such as the execution of the requisite
initialization sequence, power down mode entry/exit etc. When executing a direct mode
command the EBI shifts the contents of register EBIDIR into the SDRAM control lines.
The
Micronas
SDRAM driver (refer to document list) provides appropriate functions for
executing operations in direct mode.
4.5.2
Register Description
Access cycles to addresses specified by bit fields REDIR_LOWER and REDIR_UPPER
are redirected by hardware to the SDRAM area. The area to which the specified range
is mapped, starts at the base address (80’0000
H
) of the SDRAM. The range for
redirection is selected in groups of 16 KByte. Using the REDIR register, access cycles
to ROM located routines may be redirected to copies of these routines in the SDRAM.
REDIR Reset
Value:
0000
H
To gain access to memory areas covered by the read only PMBUS or to areas not
accessible at all (see
Figure 4-8
) accesses to segment 255 can be redirected to any
other segment in EBI address space.
Bit
Function
REDIR_LOWER
(7:0)
Base address of selected range in the ROM Area
Bitfield REDIR_LOWER specifies the MSBs of the base address of
the selected range.
REDIR_UPPER
(7:0)
Upper address of selected range in the ROM Area (exclusive)
Bitfield REDIR_UPPER specifies the MSBs of the first no longer
redirected 16 KBytes.
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
rw
rw
REDIR_UPPER (7:0)
REDIR_LOWER (7:0)
Summary of Contents for SDA 6000
Page 3: ...Contents Overview...
Page 21: ...Pin Description...
Page 22: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Pin Descriptions 2 3 Micronas 2 Pin Descriptions...
Page 29: ...Architectural Overview...
Page 33: ...C16X Microcontroller...
Page 88: ...Interrupt and Trap Function...
Page 122: ...System Control Configuration...
Page 159: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 System Control Configuration 6 40 Micronas...
Page 160: ...Peripherals...
Page 282: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Peripherals 7 124 Micronas...
Page 283: ...Clock System...
Page 284: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 3 Micronas 8 Clock System...
Page 288: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 8 Micronas...
Page 289: ...Sync System...
Page 290: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Sync System 9 3 Micronas 9 Sync System...
Page 301: ...Display Generator...
Page 348: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Display Generator 10 50 Micronas...
Page 349: ...D A Converter...
Page 352: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 D A Converter 11 6 Micronas...
Page 353: ...Slicer and Acquisition...
Page 381: ...Register Overview...
Page 398: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Register Overview 13 20 Micronas...
Page 399: ...Elelctrical Characteristics...
Page 411: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Electrical Characteristics 14 14 Micronas...