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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
C16X Microcontroller
4 - 18
Micronas
4.5
External Bus Interface (EBI).
The EBI handles access channels to four SDRAM banks within one SDRAM device and
up to two static memory devices at 100 MHz. (For lower requirements the clock
frequency can be reduced to 66 MHz, refer to
Chapter 8
). A maximum of three external
memory devices is supported.
Figure 4-5
shows the possible configurations.
Figure 4-5
External Memory Configuration
The interlocking execution of access cycles to different memory modules is supported.
All external SDRAM access cycles must be executed with a pre-defined burst length
BL = 4 and latency 3. Write access cycles, which modify less than four SDRAM
locations, are achieved by activating mask control signals L/UDQM.
The integrated refresh controller of the EBI checks for the compliance of refresh periods
and executes refresh operations on the SDRAM devices. The configuration of different
external SDRAM types can be controlled by a special SW driver as well as refresh
modes and power down features. The microcontroller and the acquisition unit use a
common interface to the EBI. A separate connection to the EBI is provided for the display
generator. The EBI performs an arbitration procedure for granting right access to either
of the request sources. But granting right access to one source does not exclude
requests initiated by the other source from being served. A maximum of two access
requests from a source may be served consecutively if the other source is addressing
an SDRAM location. Up to four consecutive access cycles from the same source are
served if the other source is addressing an external ROM device.
The following figures show typical timing diagrams that may be observed on the external
bus. The first figure presents the interlocked execution of access cycles to the external
ROM and a SDRAM device. The other figure resumes the situation when both sources
UEB11118
or
M2
ROM
Flash-ROM
(2...4 banks)
2...8 MByte
SDRAM
Flash-ROM
ROM
or
128 KByte...4 MByte
128 KByte...4 MByte
Summary of Contents for SDA 6000
Page 3: ...Contents Overview...
Page 21: ...Pin Description...
Page 22: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Pin Descriptions 2 3 Micronas 2 Pin Descriptions...
Page 29: ...Architectural Overview...
Page 33: ...C16X Microcontroller...
Page 88: ...Interrupt and Trap Function...
Page 122: ...System Control Configuration...
Page 159: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 System Control Configuration 6 40 Micronas...
Page 160: ...Peripherals...
Page 282: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Peripherals 7 124 Micronas...
Page 283: ...Clock System...
Page 284: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 3 Micronas 8 Clock System...
Page 288: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 8 Micronas...
Page 289: ...Sync System...
Page 290: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Sync System 9 3 Micronas 9 Sync System...
Page 301: ...Display Generator...
Page 348: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Display Generator 10 50 Micronas...
Page 349: ...D A Converter...
Page 352: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 D A Converter 11 6 Micronas...
Page 353: ...Slicer and Acquisition...
Page 381: ...Register Overview...
Page 398: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Register Overview 13 20 Micronas...
Page 399: ...Elelctrical Characteristics...
Page 411: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Electrical Characteristics 14 14 Micronas...