Micronas SDA 6000, User Manual

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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
Interrupt and Trap Functions
5 - 32 Micronas
After returning from the NMI service routine, the IP is popped from the stack and
immediately pushed again because of the pending UNDOPC trap.
Debug Trap
The OCDS may be programmed to trigger a Debug Trap when a debug event (match of
data/address comparison, execution of DEBUG instruction, event on
brk_in_n input)
rises. This is normally used to call a monitor routine (software debug mode) for
debugging purposes. Normal program execution resumes when a regular RETI
instruction is executed, which ends the monitor routine. This trap has the highest priority
(except for reset functions) but the monitor routine can reduce its own priority by writing
the ILVL field in the PSW.
External NMI Trap
Whenever a high to low transition on the designated nmi_n pin (Non-Maskable Interrupt)
is detected, the NMI flag in the TFR register is set and the CPU will enter the NMI trap
routine. The IP value pushed on the system stack is the address of the instruction
following the one after which normal processing was interrupted by the NMI trap.
Note: The nmi_n pin is sampled with every CPU clock cycle to detect transitions.
Stack Overflow Trap
Whenever the stack pointer is decremented to a value which is less than the value in the
stack overflow register STKOV, the STKOF flag in the TFR register is set and the CPU
will enter the stack overflow trap routine. Which IP value will be pushed onto the system
stack depends on which operation caused the decrement of the SP. When an implicit
decrement of the SP is made through a PUSH or CALL instruction, or upon interrupt or
trap entry, the IP value pushed is the address of the following instruction. When the SP
is decremented by a subtract instruction, the IP value pushed represents the instruction
address following the post subtract-instruction command.
To recover from stack overflow it must be ensured that there is enough excess space on
the stack to save the current system state twice (PSW, IP, in segmented mode also
CSP). Otherwise, a system reset should be generated.
Stack Underflow Trap
Whenever the stack pointer is incremented to a value which is greater than the value in
the stack underflow register STKUN, the STKUF flag is set in the TFR register and the
CPU will enter the stack underflow trap routine. Again, which IP value will be pushed onto
the system stack depends on which operation caused the increment of the SP. When an
implicit increment of the SP is made through a POP or return instruction, the IP value
pushed is the address of the following instruction. When the SP is incremented by an