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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
Peripherals
7 - 69
Micronas
According to
Table 7-20
a baud rate of 9600 Baud is achieved when register BG is
loaded with a value of 047
H
, assuming that
f
DIV
has been set to 11.0592 MHz.
Table 7-20
also lists a divide factor d
f
which is defined with the following formula:
This divide factor d
f
defines a fixed relationship between the prescaler output frequency
f
DIV
and the baud rate to be detected during the autobaud detection operation. This
means, that changing
f
DIV
results in a totally different baud rate table in terms of baud
rate values. For the baud rates to be detected, the following relations are always valid:
– Br0 =
f
DIV
/48
D
, Br1 =
f
DIV
/96
D
,
up to Br8 =
f
DIV
/9216
D
,
A requirement for detecting standard baud rates up to 230.400 kBaud, is the f
DIV
minimum value of 11.0592 MHz. With the value FD_VALUE in register FDV, the
fractional divider f
DIV
is adapted to the system clock frequency 33 MHz.
Table 7-21
defines the deviation of the standard baud rates when using autobaud detection
depending on the system
f
MOD
.
Note: If the deviation of the baud rate after autobaud detection is too high, the baud rate
generator (fractional divider FDV and reload register BG) can be reprogrammed if
required to get a more precise baud rate with less error.
Table 7-20
Autobaud Detection using Standard Baud Rates (
f
DIV
= 11.0592 MHz)
Baud Rate
Numbering
Detectable Standard
Baud Rate
Divide Factor d
f
BG is Loaded after
Detection with Value
Br0
230.400 kBaud
48
2
= 002
H
Br1
115.200 kBaud
96
5
= 005
H
Br2
57.600 kBaud
192
11 = 00B
H
Br3
38.400 kBaud
288
17 = 011
H
Br4
19.200 kBaud
576
35 = 023
H
Br5
9600 Baud
1152
71 = 047
H
Br6
4800 Baud
2304
143 = 08F
H
Br7
2400 Baud
4608
287 = 11F
H
Br8
1200 Baud
9216
575 = 23F
H
Table 7-21
Standard Baud Rates - Deviations and Errors for Autobaud Detection
f
MOD
FDV
Error in
f
DIV
33 MHz
172
+ 0.24%
baud rate =
f
DIV
d
f
Summary of Contents for SDA 6000
Page 3: ...Contents Overview...
Page 21: ...Pin Description...
Page 22: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Pin Descriptions 2 3 Micronas 2 Pin Descriptions...
Page 29: ...Architectural Overview...
Page 33: ...C16X Microcontroller...
Page 88: ...Interrupt and Trap Function...
Page 122: ...System Control Configuration...
Page 159: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 System Control Configuration 6 40 Micronas...
Page 160: ...Peripherals...
Page 282: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Peripherals 7 124 Micronas...
Page 283: ...Clock System...
Page 284: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 3 Micronas 8 Clock System...
Page 288: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 8 Micronas...
Page 289: ...Sync System...
Page 290: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Sync System 9 3 Micronas 9 Sync System...
Page 301: ...Display Generator...
Page 348: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Display Generator 10 50 Micronas...
Page 349: ...D A Converter...
Page 352: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 D A Converter 11 6 Micronas...
Page 353: ...Slicer and Acquisition...
Page 381: ...Register Overview...
Page 398: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Register Overview 13 20 Micronas...
Page 399: ...Elelctrical Characteristics...
Page 411: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Electrical Characteristics 14 14 Micronas...