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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
System Control & Configuration
6 - 14
Micronas
interrupt requests can be used. Power down mode can only be terminated with hardware
reset.
To prevent unintentional entry into Idle mode, the IDLE instruction has been
implemented as a protected 32-bit instruction.
Idle mode is terminated by interrupt requests from any enabled interrupt source whose
individual Interrupt Enable flag was set before the Idle mode was entered, regardless of
bit IEN.
For a request selected for CPU interrupt service, the associated interrupt service routine
is entered if the priority level of the requesting source is higher than the current CPU
priority and the interrupt system is globally enabled. After the RETI (Return from
Interrupt) instruction of the interrupt service routine is executed the CPU continues
executing the program with the instruction following the IDLE instruction. Otherwise, if
the interrupt request cannot be serviced because of a too low priority or a globally
disabled interrupt system the CPU immediately resumes normal program execution with
the instruction following the IDLE instruction.
For a request which was programmed for PEC service, a PEC data transfer is performed
if the priority level of this request is higher than the current CPU priority and the interrupt
system is globally enabled. After the PEC data transfer has been completed the CPU
remains in Idle mode. Otherwise, if the PEC request cannot be serviced because of a
too low priority or a globally disabled interrupt system, the CPU does not remain in Idle
mode but continues program execution with the instruction following the IDLE
instruction.
Mode
Idle
Sleep
Power Down
Entry by
…
writing SLEEPCON and issuing IDLE instruction
Exit by
…
any interrupt
request
external, wake up- or RTC-
IRQ
HW-reset
Summary of Contents for SDA 6000
Page 3: ...Contents Overview...
Page 21: ...Pin Description...
Page 22: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Pin Descriptions 2 3 Micronas 2 Pin Descriptions...
Page 29: ...Architectural Overview...
Page 33: ...C16X Microcontroller...
Page 88: ...Interrupt and Trap Function...
Page 122: ...System Control Configuration...
Page 159: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 System Control Configuration 6 40 Micronas...
Page 160: ...Peripherals...
Page 282: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Peripherals 7 124 Micronas...
Page 283: ...Clock System...
Page 284: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 3 Micronas 8 Clock System...
Page 288: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 8 Micronas...
Page 289: ...Sync System...
Page 290: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Sync System 9 3 Micronas 9 Sync System...
Page 301: ...Display Generator...
Page 348: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Display Generator 10 50 Micronas...
Page 349: ...D A Converter...
Page 352: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 D A Converter 11 6 Micronas...
Page 353: ...Slicer and Acquisition...
Page 381: ...Register Overview...
Page 398: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Register Overview 13 20 Micronas...
Page 399: ...Elelctrical Characteristics...
Page 411: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Electrical Characteristics 14 14 Micronas...