Micronas SDA 6000, User Manual

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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
Peripherals
7 - 21 Micronas
7.1.2.1 Core Timer T6
The operation of the core timer T6 is controlled by its bit-addressable control register
T6CON.
Timer 6 Run Bit
The timer can be started or stopped by software through bit T6R (Timer T6 Run Bit).
Setting bit T6R will start the timer, clearing T6R stops the timer.
Note: When bit T5RC is set, bit T6R will also control (start and stop) auxiliary timer T5.
Count Direction Control
The count direction of the core timer can be controlled by software. The count direction
can be changed regardless of whether the timer is running or not.
Note: The direction control works the same for core timer T6 and for auxiliary timer T5.
Therefore the lines and bits are named Tx …
Timer 6 Overflow/Underflow Monitoring
An overflow or underflow of timer T6 will clock the toggle latch T6OTL in control register
T6CON. T6OTL can also be set or reset by software. T6OTL can be used in conjunction
with the timer over/underflows as an input for the counter function of the auxiliary timer
T5.
Timer 6 in Timer Mode
Timer mode for the core timer T6 is selected by setting bit field T6M in register T6CON
to ‘000
B
’. In this mode, T6 is clocked with the module clock divided by a programmable
prescaler, which is selected by bit field T6I. The input frequency
f
T6
for timer T6 and its
resolution
r
T6
are scaled linearly with lower clock frequencies
f
hw_clk
, as can be seen from
the following formula:
Table 7-7 Core Timer T6 Count Direction Control
Bit TxUD Count Direction
0 Count Up
1 Count Down
f
T6
=
f
hw_clk
BPS2
⌠
2
<T6I>
r
T6
[ms] =
f
hw_clk
[MHz]
BPS2
⌠
2
<T6I>