Micronas SDA 6000, User Manual

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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
Peripherals
7 - 56 Micronas
Figure 7-28 Fixed IrDA Pulse Generation
The IrDA pulse width can be calculated according to the formulas given in the following
table.
The name S0PWM in the formulas represents the contents of the reload register
S0PWM (bits S0PW0-7), taken as an unsigned 8-bit integer.
The content of S0PWM further defines the minimum IrDA pulse width (
t
IPW min
) which is
still recognized as a valid IrDA pulse during a receive operation. This function is
independent of the selected IrDA pulse width mode (fixed or variable) which is defined
by bit S0IRPW in register S0PWM. The minimum IrDA pulse width is calculated by a shift
right operation of S0PWM bit 7-0 by one bit divided by the CPU clock (33.33 MHz).
Note: If S0IRPW=0 (fixed IrDA pulse width), SxPWM bit 7-0 must be loaded with a value
which assures that
t
IPW
>
t
IPW min
.
RXD/TXD Data Path Selection in Asynchronous Modes
The data paths for the serial input and output data in asynchronous modes are affected
by several control bits in the registers S0CON and S0ABCON, as shown in
Figure 7-29 .
The synchronous mode operation is not affected by these data path selection
capabilities.
The input signal from RXD passes an inverter which is controlled by bit ABCON_RXINV.
The output signal of this inverter is used for the autobaud detection and may bypass the
ASC_P logic in the echo mode (controlled by bit ABCON_ABEM). Furthermore, two
multiplexers are in the RXD input signal path to provide the loopback mode capability
(controlled by bit CON_LB) and the IrDA receive pulse inversion capability (controlled by
bit CON_RXDI).
S0PWM S0IPWM Formulas
1 … 255 0
1
UED11147
S0PWM
8-Bit Timer 33 MHz
Start Timer
IPW
t
IrDA Pulse
t
IPW
=
16 x 33 MHz
3
t
IPW min
=
33 MHz
(S0PWM >> 1)
t
IPW
=
33 MHz
S0PWM