Micronas SDA 6000, User Manual

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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
Interrupt and Trap Functions
5 - 15 Micronas
Byte/Word Transfer bit BWT controls, if a byte or a word is moved during a PEC service
cycle. This selection controls the transferred data size and the increment step for the
modified pointer.
Increment Control Field INC controls, if one of the PEC pointers is incremented after
the PEC transfer. However, it is not possible to increment both pointers. If the pointers
are not modified (INC = ‘00’) the respective channel will always move data from the
same source to the same destination.
Note: The reserved combination ‘11’ is changed to ‘10’ by hardware. However, it is not
recommended to use this combination.
The PEC Transfer Count Field COUNT controls the action of a respective PEC channel,
where the content of bit field COUNT, at the time the request is activated, selects the
action. COUNT may allow a specified number of PEC transfers, unlimited transfers or no
PEC service at all.
The table below summarizes, how the COUNT field itself, the interrupt requests flag IR
and the PEC channel action depends on the previous content of COUNT.
INC(1 … 0) Increment Control
(Modification of SRCPx or DSTPx)
0 0: Pointers are not modified.
0 1: Increment DSTPx by 1 or 2.
1 0: Increment SRCPx by 1 or 2.
1 1: Reserved. Do not use this combination.
CL Channel Link Control
0: PEC channels work independent
1: Pairs of channels are linked together
CLT Channel Link Toggle State
0: Even numbered PEC channel of linked channels active
1: Odd numbered PEC channel of linked channels active
Table 5-3 PEC Control Register Addresses
Register Address Reg. Space Register Address Reg. Space
PECC0 FEC0
H
/ 60
H
SFR PECC4 FEC8
H
/ 64
H
SFR
PECC1 FEC2
H
/ 61
H
SFR PECC5 FECA
H
/ 65
H
SFR
PECC2 FEC4
H
/ 62
H
SFR PECC6 FECC
H
/ 66
H
SFR
PECC3 FEC6
H
/ 63
H
SFR PECC7 FECE
H
/ 67
H
SFR
Bit Function