Micronas SDA 6000, User Manual

Page: 405 / 412

SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
Electrical Characteristics
14 - 8 Micronas
TXT data amplitude
V
DATA
0.3 0.7 V –
De-coupling Capacitors to
V
DDA
at Pins CVBSi
C
Dec_CPL
– – nF –
RGB-Outputs
Load capacitance
C
P
– 20 pF –
Output voltage swing
V
outpp
0.5 1.2 V available: 0.5 V; 0.7 V;
1.0 V; 1.2 V
RGB offset
U
offset
0.27 0.33 V –
Rise/Fall Times
t
RF
8.0 12.5 ns 8.0 ns (50 MHz output
BW)
12.5 ns (32 MHz
output BW)
Load resistance
R
L
10 – k –
Diff. non-linearity – – 0.5 0.5 LSB –
Int. non-linearity – – 0.5 0.5 LSB –
Output current tracking – – 3 % –
Skew to COR, Blank
t
skew
– 5 5 ns –
Jitter to Horizontal Sync
Reference
t
Jit
– 4 ns –
Address Bits: A0 to A9, RD, CSROM
Output Rise Time
t
r
– 16 ns (10% - 90%)
Output Fall Time
t
f
– 16 ns (10% - 90%)
Load Capacitance
C
L
– 35 pF –
Address Bits: A10 to A15
Output Rise Time
t
r
– 6 ns (10% - 90%)
Output Fall Time
t
f
– 6 ns (10% - 90%)
Load Capacitance
C
L
– 35 pF –
P4.(0 .. 5)
Output Rise Time t
r
– 16 ns (10% - 90%)
Output Fall Time
t
f
– 16 ns (10% - 90%)
Load Capacitance
C
L
– 35 pF –
Table 14-3
DC Characteristics
(cont’d)
Parameter Symbol Limit Values Unit Test Condition
min. max.