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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
Peripherals
7 - 60
Micronas
Figure 7-31
ASC0 Synchronous Mode Waveforms
7.3.3
Baud Rate Generation
The serial channel ASC0 has its own dedicated 13-bit baud rate generator with 13-bit
reload capability, allowing baud rate generation to be independent of the GPT timers.
The baud rate generator is clocked with the CPU clock. The baud rate timer is counting
downwards and can be started or stopped through the baud rate generator run bit S0R
in register S0CON. Each underflow of the timer provides one clock pulse to the serial
channel. The timer is reloaded with the value stored in its 13-bit reload register each time
it underflows. The resulting clock
f
BRT
is again divided according to the operating mode
and controlled by the baud rate selection bit S0BRS. If S0BRS = ‘1’, the clock signal is
additionally divided to 2/3rd of its frequency (see formulas and table). So the baud rate
of ASC0 is determined by the CPU clock, the reload value, the value of S0BRS and the
operating mode (asynchronous or synchronous).
UET11150
Receive Data
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
1. Byte
2. Byte
Transmit Data
D1
D0
D2
D0
D6
1. Byte
D3
D4
D5
D7
D1
2. Byte
D2
D3
Shift Clock
Continuous Transmit Timing
Data Bit n+1
Data Bit n+2
Data Bit n
Shift Clock
Transmit Data
Valid Data n
Receive Data
Valid Data n+1
Valid Data n+2
Shift Latch Shift Latch Shift
Receive/Transmit Timing
Summary of Contents for SDA 6000
Page 3: ...Contents Overview...
Page 21: ...Pin Description...
Page 22: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Pin Descriptions 2 3 Micronas 2 Pin Descriptions...
Page 29: ...Architectural Overview...
Page 33: ...C16X Microcontroller...
Page 88: ...Interrupt and Trap Function...
Page 122: ...System Control Configuration...
Page 159: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 System Control Configuration 6 40 Micronas...
Page 160: ...Peripherals...
Page 282: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Peripherals 7 124 Micronas...
Page 283: ...Clock System...
Page 284: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 3 Micronas 8 Clock System...
Page 288: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 8 Micronas...
Page 289: ...Sync System...
Page 290: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Sync System 9 3 Micronas 9 Sync System...
Page 301: ...Display Generator...
Page 348: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Display Generator 10 50 Micronas...
Page 349: ...D A Converter...
Page 352: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 D A Converter 11 6 Micronas...
Page 353: ...Slicer and Acquisition...
Page 381: ...Register Overview...
Page 398: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Register Overview 13 20 Micronas...
Page 399: ...Elelctrical Characteristics...
Page 411: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Electrical Characteristics 14 14 Micronas...