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SDA 6000
PRELIMINARY DATA SHEET
Version 2.1
System Control & Configuration
6 - 13
Micronas
6.4
Power Reduction Modes
Three power reduction modes with different levels of power reduction, which may be
entered under software control, have been implemented in M2:
Idle Mode:
The CPU is stopped, while the peripherals including watchdog timer continue
their operation at low clock frequency.
Sleep Mode:
CPU, peripherals and PLL are completely turned off. The controller ADC
operates in wake-up mode. The real-time-clock is still in operation.
Power Down Mode:
All modules are turned off.
In the table above clocking frequencies have been specified, indicating that power
reduction is achieved by means of clock-gating. None of the power supplies are
internally switched, neither may voltage be turned off at the supply pins.
M2’s power management functions are supplemented by a Real Time Clock (RTC) timer
with optional periodic wake-up from idle mode. The periodic wake-up combines the
reduced power consumption in power reduction modes with a high level of system
availability. External signals and events can be scanned (at a lower rate) by periodically
activating the CPU and selected peripherals which then return to power-save mode after
a short time. This greatly reduces the system’s average power consumption.
Entering and Terminating Idle and Sleep Mode
All three modes are entered by writing register SLEEPCON (see register definition
below) and issuing the IDLE instruction. All external bus actions are completed before
entry to Idle, Sleep or Power Down mode. Normal operation is resumed after Idle mode
upon any interrupt request. To return from Sleep mode, external, wake up- or RTC-
Mode
Normal
Idle
Sleep
Power Down
Oscillator
on
on
on
off
PLL
on
on
off
off
CPU
33 MHz
3 MHz/
stopped
no clock/
stopped
no clock/
stopped
CADC
33 MHz
1)
1)
Conversion mode
3 MHz
2)
2)
Wake up mode
3 MHz
2)
off
RTC
3 MHz
3 MHz
3 MHz
off
Peripherals
33 MHz
3 MHz
off
off
Bus Interface
100/66 MHz
3)
3)
Depending on value of CLKCON (see
Chapter 8
)
off
off
off
Summary of Contents for SDA 6000
Page 3: ...Contents Overview...
Page 21: ...Pin Description...
Page 22: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Pin Descriptions 2 3 Micronas 2 Pin Descriptions...
Page 29: ...Architectural Overview...
Page 33: ...C16X Microcontroller...
Page 88: ...Interrupt and Trap Function...
Page 122: ...System Control Configuration...
Page 159: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 System Control Configuration 6 40 Micronas...
Page 160: ...Peripherals...
Page 282: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Peripherals 7 124 Micronas...
Page 283: ...Clock System...
Page 284: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 3 Micronas 8 Clock System...
Page 288: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Clock System 8 8 Micronas...
Page 289: ...Sync System...
Page 290: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Sync System 9 3 Micronas 9 Sync System...
Page 301: ...Display Generator...
Page 348: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Display Generator 10 50 Micronas...
Page 349: ...D A Converter...
Page 352: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 D A Converter 11 6 Micronas...
Page 353: ...Slicer and Acquisition...
Page 381: ...Register Overview...
Page 398: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Register Overview 13 20 Micronas...
Page 399: ...Elelctrical Characteristics...
Page 411: ...SDA 6000 PRELIMINARY DATA SHEET Version 2 1 Electrical Characteristics 14 14 Micronas...