HP 3562A, Service Manual

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MODE L 3562A C I RCUIT DESCRI PTIONS
B U SYL
C1 0FSE
C H I RP L
PHAS E COUNTERS BUSY
Active Low
This signal from the phase cou nters goes low after an ARML has occurred
and goes high after the counters finish counting. BUSYL is sent to the status
registers.
1 0x E FFECTIVE SAMPLE RATE CLOCK
In baseband mode this clock occurs at 10 times the effective sample rate.
CH I RP
Active Low
When this control signal is low, the sinusoidal signal from the A4 Local
oscillator is passed through the digital source board without mixing with
the random noise.
C NTRL B U SY
CONTROL BUSY
CONT
CON TRO L
This is the digital source handshake signal for sending the control data word
(CNTLD). If it is "1 ', the digital sou rce is sending the word. If it is "0', the
digital sou rce is ready to send another control data word. This signal is from
the control register to the status registers.
CONTINUOUS
_
When this control signal is high, the digital source keeps the A30 Analog
Source enabled. When low, the analog source is gated by the burst control
circu it.
CONTROL
Signal from the device decoder PAL that latches the control word from
the DS data bus.
C O U N TE N L
COUNT ENABLE
Active Low
ARML starts the phase state machine which sets sets CO UNTE NL low and
the counters start cou nting.
� . � �- -
Example DA DB M U ll DSE L
Frequency (U 1 -3)
(U4-1 2)
(U 1 ) (U1 01 -2)
S pans
1 kHz 0 0 x 1 1
3.1 25 kHz 0 1 x 2 1
1 0 kHz 1
0 x 5
1
1 00 kHz 1 1 x1 0 0
20 kHz 1 0 x 5
0
50 kHz
0
1 x 2
0
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