FAU LT I SOLATION
MOD E L 3562A
TEST RESU LT
F I RST PASS
This key displays the resu lt of the first conversion pass of the ADCs. (Refer
to 8-1 9)
D IGTAL TEST
This key in itiates a test of the ADC's digital section. The ADC Controller
(A32 U602) outputs test patterns to the AS Dig ital Fi lter. The A2 System
CPU reads the resu lts from the AS Digital Fi lter and compares the resu lts
with known good val ues.
D I GTAL TRAC E
When th is key is pressed, a test pattern is generated. By running the Digital
Trace test in loop mode, a logic probe or oscil loscope can be used to trace
d igital signals on the A32, A34 assembl ies.
PASS THRU
When this key is pressed, the ADC's outputs are displayed in the test log.
SECOND PASS
This key d isplays the result of the second conversion pass of the A DCs.
(Refer to 8-1 9)
This key displays the menu for the Test and Fault Logs. Refer to paragraph 7-1 5 for a
complete description of the Test Log and the Fault Log. The CLEAR TEST key is used to
clear the Test Log (press twice to clear log). The CLEAR FAU LT key is used to clear the
Fault Log (press twice to clear log).
lOOP O N O F F
to
I ntermittent
Failures" for a complete description of the loop mode and how to use it.
7-1 7 SELF-CALIBRATION
The H P 3562A has a stable internal calibration sou rce which is used periodical ly to calibrate
the input circu its. The calibration s ignal is generated on the A30 Analog Sou rce c i rcu it
board. The self-cal ibration ru ns at the fol lowi ng times if the 'AUTO' cal ibration key is
on: power-on, 8 m i n utes after power-on, 12 m i nutes after power-on, 40 m i nutes after
power-on, and every two hours thereafter.
7-67
Summary of Contents for 3562A
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