MOD E L 3562A
C I RC U I T D E SC R I PT I O N S
The DAC converts the f i rst pass word back to a voltage which goes to the second pass
c i rcuit (U406). This c i rcuit compares the converted signal to the original in put signal and
produ ces a d ifference voltage. The control ler sets the the process switch to send this
difference voltage to the A/D converter where it is converted . When the conversion i s
complete, the contro l ler i nputs the res u lt, scales i t down and adds i t to the first pass word
to obtain a 1 3-bit data word. The control ler sends the converted data to the d igital fi lter
in a serial format after the d igital fi lter sends a req uest for the data (D REQL).
Between each of the passes, the control ler sets the process switch to send a .34 volt dc
signal to the AID converter to reset it. This "th i rd pass" shows in figure 6-A32b as the
. high portion of the signal. The first pass appears as the signal following a roughly sinusoidal
pattern and the second pass appears as a noisy signal centered within the first pass sine
wave.
PASS"
Figure 6-A32b Process switch output; TP40S
Table 6-A3 2b Process switch configuration Information
First Pass Circuit
.34 Vdc Reference
Second Pass C ircu it
6.2 V reference voltage
1
o
o
ST PASS
x
o
The ADC board uses the 6.2 voltage reference generated by the DAC. This red u ces the
error due to temperatu re variations. The voltage reference is used by the A/D converter,
the track and hold circuit, and the over range/half range circ u it. Since the A/D converter's
gain is control led by this reference, the adjustment for the voltage reference is also the
AID converter's gain adjustment.
6-1 1 7
Summary of Contents for 3562A
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Page 237: ...Sample Clock SAMP DS DATA oe _ _ _ _ _ BUS NOTE FULL SPA BASi BAI MODE ...
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Page 305: ...c c I O Sequencer S r J Sequence Decoder ...
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Page 324: ...EXT TRIGGER TRIG 1 TRIG 2 CALTRIG CNTLD COMI W CNTCLK LDTRGL RESETL ...
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