SERV I C E
MOD E L 3562A
Table A7-1 FPP Diagnostics
Test Messages
Passes
Fails
Su bblocks verified
Perform Signature
Analysis Tests (D)
in order l isted
FPP Function Test:
Floating Point Processor
A l l subblocks of the FPP are
Continue with
exercised. If this test
self-tests
passes but an FPP function is fail-
ing, perform SA test #2 and #4.
Command Pointer Test:
FPP Command Poi nter Test
Command Poi nter Registers
SA #1
Bits correspond to B bus 0
DT ACK Ci rcuit
SA #2
to 1 5 and
Y
bus 0 to 23
FPP I nterrupt Circuit
SA #3
G lobal Data Bus Output Reg isters
SA #4
Partial verification of ALUs
FPP Interrupt Test
FPP I nterrupt Ci rcuit
The FPP did not return
I RQT3 to the CPU after
ru n n ing a test. Conti nue
with self-tests.
Jumper Echo Test:
FPP J umper Echo Bits
Command Poi nter Registers
SA #1
correspond to B bus 0 to 1 5
DT ACK Ci rcuit
SA #2
and
Y
bus 0 to 23
FPP I nterrupt Ci rcuit
SA #3
G lobal Data Bus Output Registers
SA #4
Partial verification of ALUs
Block Set Test:
FPP Address Test Bits
G lobal Address Registers
SA #1
correspond to B bus 0 to 1 5
G lobal Data Bus I nput Registers
SA #4
Atv Test A:
FPP ALU Test A Bits
Partial verification of ALUs
SA #2
correspond to
Y
bus 0 to 23
SA #3
SA #4
ALU Test B:
FPP ALU Test B Bits
ALUs
SA #2
correspond to
Y
bus 0 to 23
Carry Look-ahead subblock
SA #3
S h ift PA L (U21 2)
SA #4
Status Mu ltiplexer (U201 )
Sequencer
Reset FPP Test:
FPP RESET Test
Pipeline Data Bus
SA #3
Partial verification of
SA #4
Sequencer
If a l l the self-tests fail, start with signature analys is test #1 .
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Summary of Contents for 3562A
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Page 207: ...MODEL 3562A CR Cl ...
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Page 237: ...Sample Clock SAMP DS DATA oe _ _ _ _ _ BUS NOTE FULL SPA BASi BAI MODE ...
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Page 259: ...WRITEL A22L l cc E Vl 8 MHz A23L ASL Inverting A1L A21 L D rivers r ...
Page 305: ...c c I O Sequencer S r J Sequence Decoder ...
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Page 324: ...EXT TRIGGER TRIG 1 TRIG 2 CALTRIG CNTLD COMI W CNTCLK LDTRGL RESETL ...
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