HP 3562A, Service Manual

Page: 241 / 570

MODE L 3562A
C I RCUIT DESC R I PTIONS
TIMING
Burst Control Circuit
(Refer to figure 6-A1 d) The burst control circuit controls the burst length and generates
the pu lse signal (NCLK) to the local oscillator. It provides the gating signal (BU RSTE N)
that gates the analog source on and off during the burst and chirp modes. The burst con­
trol circuit also provides the SYNC OUT signal to the rear panel. This signal is high when
the burst is on and is low when the burst is off.
When SELCNTERSL is active and WRITEL is low, a data word from the system CPU is
latched into the programmable counters to set the time the burst is on and off. After the
counters are programmed, the CONT signal from the control registers to the bu rst gate
goes low. I n freerun mode the freerun bit (U1 02-9) is set and the burst counters count
blocks. The burst control circuit then gates the analog source on and off. I n the triggered
mode, the bu rst process starts when the ARMEDL signal from the phase resolution circuit
goes low. The counters only count when ARMEDL is low. The ARMEDL signal also causes
the burst control circuit to send the NCLK signal to the local oscil lator. When NCLK is
received by the local osci lla�or, the LO is set to the starting frequency of the burst. The
local oscillator sends data (N DAT) to the digital source synchronized to NCLK. The data
is processed by the LO input receiver and multipl ier. DACDAT data is sent to the analog
source at the same time the burst control circuit turns on the analog source.
After the burst is completed, the burst state machine checks to see if the ARMEDL signal
is stil l active. If ARMEDL is active, the process repeats. All burst control operations are
synchronized to the sample and trigger signals by the timing control circuit and the
ARMEDL signal.
CONTROL
BURST
STATE
MAC H I N E
Burst B U RSTEN
Gate
S E LCNTRSL
PROG RAMMABLE
DACDAT
ANALOG
SOURCE
COUNTERS
A30
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DS DATA
BUS
CONT
From
Local
Oscillator
La
IN PUT RECE IVER
AND
NOISE G E N E RATOR
Figure
6-A 1 d
Burst Control Circuit
Sync Out
NCLK
To La
Sourcout
To Front
Panel
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6-1 9