S E RV I C E
MOD E L 3562A
8-78
5 . ALU Test A
When the ALU Test A key is pressed, patterns are written to the ALUs (U303, U304,
U305, U307, U308, U31 0) and sh ift PAL (U21 2). The FPP outputs data to the global
RAM which is verified by the system
cpu.
This test can be ru n in loop mode by setting
A7 J 2A and A7 J 2 B to test position.
6. ALU Test B
When the ALU Test B key is pressed, the ALUs are thoroughly tested along with the
carry look-ahead subblock (U21 1 , U302), the sh ift PAL (U21 2), the status mu ltip lexer
(U201 ), and the sequencer (U1 03).
D. A7 Signature Analysis Tests
Use these tests to isolate a fa i l u re on the FPP assem bly. O n ly the com ponents in fai l ing
subblocks need to be tested. The term 'toggl ing' refers to a signal conti nually changing
between TTL level h igh and TTL level low.
1 . Press the line switch off.
2 . Put a l l jumpers i n normal (N) position.
3 . Connect the Signatu re Analyzer a s fol lows:
Table A7-2 A7 Signature Analyzer Setup
#1
Signal
G round
Cl ock
Stop
Start
4. Press the l i ne switch on.
Polarity
Positive edge
Negative edge
Positive edge
5. Signatu re Analysis Test #1 Setu p:
Connection
A7 )5-1
A7 ) 5-3
A7 ) 5-4
A7 ) 5-5
a. Put jumper A7 J 2 B in test position with the power on.
b. Press A2 S1 (reset switch on the A2 CPU). The FPP status LEDs should read
0000 0001 (1
=
on, 0
=
off). If this test is not stable, use signature analysis tests
#3 and #4.
Summary of Contents for 3562A
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