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UART Modules
32-11
Freescale Semiconductor
32.3.6
UART Receive Buffers (URB
n
)
The receive buffers contain one serial shift register and three receiver holding registers, which act as a
FIFO. U
n
RXD is connected to the serial shift register. The CPU reads from the top of the FIFO while the
receiver shifts and updates from the bottom when the shift register is full (see
). RB contains
the character in the receiver.
3–2
TC
Transmit command field. Selects a single transmit command.
1–0
RC
Receive command field. Selects a single receive command.
Table 32-7. UCR
n
Field Descriptions (continued)
Field
Description
Command
Description
00
NO
ACTION
TAKEN
Causes the transmitter to stay in its current mode: if the transmitter is enabled, it
remains enabled; if the transmitter is disabled, it remains disabled.
01
TRANSMITTER
ENABLE
Enables operation of the UART’s transmitter. USR
n
[TXEMP,TXRDY] are set. If the
transmitter is already enabled, this command has no effect.
10
TRANSMITTER
DISABLE
Terminates transmitter operation and clears USR
n
[TXEMP,TXRDY]. If a character
is being sent when the transmitter is disabled, transmission completes before the
transmitter becomes inactive. If the transmitter is already disabled, the command
has no effect.
11
—
Reserved, do not use.
Command
Description
00
NO
ACTION
TAKEN
Causes the receiver to stay in its current mode. If the receiver is enabled, it
remains enabled; if disabled, it remains disabled.
01
RECEIVER
ENABLE
If the UART module is not in multidrop mode (UMR1
n
[PM]
11),
RECEIVER
ENABLE
enables the UART's receiver and forces it into search-for-start-bit state. If the
receiver is already enabled, this command has no effect.
10
RECEIVER
DISABLE
Disables the receiver immediately. Any character being received is lost. The
command does not affect receiver status bits or other control registers. If the
UART module is programmed for local loopback or multidrop mode, the receiver
operates even though this command is selected. If the receiver is already
disabled, the command has no effect.
11
—
Reserved, do not use.
Summary of Contents for MCF54455
Page 33: ...xxviii Freescale Semiconductor ...
Page 67: ...Freescale Semiconductor 1 ...
Page 125: ...Freescale Semiconductor 1 ...
Page 145: ...Enhanced Multiply Accumulate Unit EMAC 5 21 Freescale Semiconductor ...
Page 173: ...Cache 6 28 Freescale Semiconductor ...
Page 179: ...Static RAM SRAM 7 6 Freescale Semiconductor ...
Page 207: ...Power Management 9 16 Freescale Semiconductor ...
Page 323: ...Reset Controller Module 13 8 Freescale Semiconductor ...
Page 389: ...Pin Multiplexing and Control 16 44 Freescale Semiconductor ...
Page 575: ...PCI Bus Controller 22 58 Freescale Semiconductor ...
Page 600: ...Advanced Technology Attachment ATA Freescale Semiconductor 23 25 ...
Page 601: ...Freescale Semiconductor 1 ...
Page 842: ...I2 C Interface Freescale Semiconductor 33 16 ...
Page 843: ...Freescale Semiconductor 1 ...
Page 921: ...Revision History A 6 Freescale Semiconductor ...