Freescale Semiconductor MCF54455, Reference Manual

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Signal Descriptions
2-16 Freescale Semiconductor
2.3.12 ATA Controller Signals
Table 2-14. ATA Controller Signals
Signal Name Abbreviation Function I/O
ATA Data Bus ATA_DATA[15:0] The bi-directional, three-state ATA data bus. I/O
ATA Buffer Enable ATA_BUFFER_EN This output signal is the ATA transceiver direction-control signal. O
ATA Chip Selects ATA_CS[1:0] These output signals ATA bus chip selects. O
ATA Address ATA_DA[2:0] These output signals are ATA bus address group. O
ATA Reset ATA_RESET This output signal is ATA reset signal. When asserted, ATA bus is in
reset state. When negated, no reset. ATA bus is in reset when the
appropriate bit in the control register is cleared. After system reset,
ATA bus is in reset. O
ATA DMA Request ATA_DMARQ This input signal is the ATA bus device DMA request. It is asserted by
the device if it wants to transfer data using multiword DMA or ultra
DMA mode I
ATA DMA Acknowledge ATA_DMACK This output signal is the ATA bus host DMA acknowledge. It is
asserted by the host when it grants the DMA request. O
ATA I/O Ready In ATA_IORDY This input is the ATA IORDY line. It has three functions:
• IORDY—active low wait during PIO cycles,
• DDMARDY—active low device ready during ultra DMA out
transfers
• DSTROBE—device strobe during ultra DMA in transfers
I
ATA DIO Read ATA_DIOR This output signal corresponds to ATA signal DIOR. During PIO and
multiword DMA transfers, its function is read strobe. During ultra DMA
IN burst, its function is HDMARDY. During ultra DMA OUT burst, its
function is host strobe (HSTROBE). O
ATA DIO Write ATA_DIOW This output signal corresponds to ATA signal DIOW. During PIO and
multiword DMA transfers, its function is write strobe. During ultra DMA
burst, its function is STOP, signalling when the host wants to terminate
an ultra DMA transfer. O
ATA Interrupt Request ATA_INTRQ This input signal is the ATA bus interrupt request. It is asserted by the
device when it wants to interrupt. I