Agilent Technologies EasyEXPERT, Manual, Page: 167 / 610

6 Memory
6.12 NandFlash2 WordDisturb(ErasedCell): NAND flash memory cell erase-
disturb test (A.01.20)
[Supported Analyzer]
B1500A
[Description]
Performs the erase-disturb test of the NAND-type flash memory cell, and plots the accumulated stress time vs
threshold voltage characteristics.
[Device Under Test]
NAND-type flash memory cell
Connect the Control Gate to the ASU1 Output, and the Drain to the ASU2 Output.
Open the Floating Gate, and connect the other terminals to the ASU3 Output.
[Required Modules and Accessories]
Agilent 81110A pulse generator (2-output, PGU1 and PGU2) 1 unit
HRSMU/ASU 3 sets (ASU1, ASU2, and ASU3)
ASU1 connections: Output: Control Gate, SMU: HRSMU, AUX: PGU1
ASU2 connections: Output: Drain, SMU: HRSMU, AUX: PGU2
ASU3 connections: Output: Source and Substrate, SMU: HRSMU, AUX: PGU2
Setting of ASU I/O Path, ASU tab, Configuration window: AUX
[Device Parameters]
Lg: Gate length
Wg: Gate width
Temp: Temperature
IdMax: Drain current compliance
[Test Parameters]
Gate: SMU connected to Gate terminal, primary sweep voltage output
Drain: SMU connected to Drain terminal, constant voltage output
Source: SMU connected to Source terminal, constant voltage output
VgStart: Sweep start voltage for Gate terminal
VgStop: Sweep stop voltage for Gate terminal
VgStep: Sweep step voltage for Gate terminal
VgStress: Stress voltage for Gate terminal
Vd: Drain voltage
Vs: Source voltage
Id@Vth: Drain current to decide the Vth
IntegTime: Integration time
TotalStressTime: Total accumulated stress time
CheckNoOfTimes: Number of Vth measurement operation
PulsePeriod: Erase pulse period
PulseDelay: Erase pulse delay
PulseWidth: Erase pulse width
Verase: Erase pulse output level
LeadingTime: Pulse leading edge transition time
TrailingTime: Pulse trailing edge transition time
[Extended Test Parameter]
Agilent EasyEXPERT Application Library Reference, Edition 8
6-27