CPU, Frame Generator, and Clock Modules
CPU Module
174
TSG-3800 User’s Guide
12778474-002-2 Revision F – March 2004
Making Signal Connections
All external connections to this module use the Comm A and Comm B EIA-232
ports. Comm A is located on the front of the CPU module and Comm B is on the
rear panel of the TSG-3800 main shelf. The connectors are 25-pin female, D-style
connectors secured with two screws. See
Table 6-3
for pin assignments and
locations.
Phase Measurements (each input)
Most recent 100 values @ 1 second avg;
1000 values @ 100 second avg
Control Value Calculations
(each of 2 oscillators)
Most recent 100 values @ 1 second avg;
1000 values @ 100 second avg
Other Measurements
(each input)
AIS, BPV, CRC, LOS, OOF errored and clear intervals
Event Log
Stores up to 500 events including input and system faults,
operator inputs, and system actions; time and date stamped
to the nearest millisecond
System Interface
Dual EIA-232 connectors, 300-19,200 baud, 8-bit, no parity, 1
stop bit; also Ethernet 10 base-T (optional)
EIA-232 Monitor
Activity monitor: COMMA, COMMB
Table 6-2. CPU Module Specifications (Continued)
Signal Characteristic
Specification
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