Renesas V850 Series, Руководство пользователя, Страница: 384 / 1556

R01UH0336EJ0102 Rev.1.02 Page 384 of 1538
Jul 17, 2014
V850E2/PG4-L Section 11 Data CRC Function A (DCRA)
(2) DCRAnCOUT
―
CRC Data Register
This register stores the result of the CRC code generated by the 32-bit
Ethernet or 16-bit CCITT polynomial.
Access This register can be read/written in 32-bit units.
Address <DCRAn_base0> + 04
H
Initial value FFFF FFFF
H
This register is initialized by any reset sources.
Caution This register must be initialized with the starting value before the first data of
the data block is written to the DCRAnCIN register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DCRAnCOUT[31:16]
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DCRAnCOUT[15:0]
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Table 11-6 DCRAnCOUT Register Contents
Bit Position Bit Name Function
31 to 0 DCRAnCOUT
[31:0] Result of the CRC code generation.
When the 16-bit CCITT polynomial is enabled, bits 15 to 0 show the CRC
result. The bits 31 to 16 are undefined.
On reading these bits, the value read out is the XOR of the value described
below and the DCRAnCOUT.DCRAnCOUT bits (this does not affect the
DCRAnCOUT.DCRAnCOUT bits).
• 32-bit Ethernet polynomial: FFFF FFFF
H
• 16-bit CCITT CRC polynomial: 0000
H
Therefore, for the 32-bit Ethernet polynomial, 0000 0000H is read from this
register even in the initial state (FFFF FFFF
H
).