Renesas V850 Series, Руководство пользователя

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R01UH0336EJ0102 Rev.1.02 Page 1462 of 1538
Jul 17, 2014
V850E2/PG4-L Section 24 Peripheral Interconnection (PIC)
Table 24-47 TSG20 Setting
Function Register Bit Position Bit Name Set Value Note
TSG20 TS0CTL0 1,
0 TS0MD1,
TS0MD0 1,
1 Selects operating mode (120-DC).
TS0CTL3
1
TS0RIA
Don’t care Selects the reload timing of the compare register.
0 TS0RMC Don’t care Selects the transfer timing of the compare register.
TS0CTL4
8
TS0PRE
Don’t care Enables or disables peak reload timing.
7 TS0VRE Don’t care Enables or disables valley reload timing.
6
TS0PIE
Don’t care Enables or disables generation of the peak interrupt.
5 TS0VIE Don’t care Enables or disables generation of the valley interrupt.
4 to 0
TS0RCC4,
TS0RCC3,
TS0RCC2,
TS0RCC1,
TS0RCC0
Don’t care Sets the thinning out rate of reload timing and
interrupt.
TS0IOC0 6 TS0TOE6 Don’t care Enables or disables rewrite of the TS0OL6 and
TS0TO6 bits in TS0IOC2.
5 TS0TOE5 Don’t care Enables or disables rewrite of the TS0OL5 and
TS0TO5 bits in TS0IOC2.
4 TS0TOE4 Don’t care Enables or disables rewrite of the TS0OL4 and
TS0TO4 bits in TS0IOC2.
3 TS0TOE3 Don’t care Enables or disables rewrite of the TS0OL3 and
TS0TO3 bits in TS0IOC2.
2 TS0TOE2 Don’t care Enables or disables rewrite of the TS0OL2 and
TS0TO2 bits in TS0IOC2.
1 TS0TOE1 Don’t care Enables or disables rewrite of the TS0OL1 and
TS0TO1 bits in TS0IOC2.
TS0IOC1 4 TS0PTS 1 Enables toggle signal output on edge detection of
TSG20PTSI0 to TSG20PTSI2.
TS0IOC2 14 TS0OL6 Don’t care Selects an active level of the TSG20O6 output.
13
TS0OL5
Don’t care Selects an active level of the TSG20O5 output.
12 TS0OL4 Don’t care Selects an active level of the TSG20O4 output.
11 TS0OL3 Don’t care Selects an active level of the TSG20O3 output.
10
TS0OL2
Don’t care Selects an active level of the TSG20O2 output.
9 TS0OL1 Don’t care Selects an active level of the TSG20O1 output.
TS0OPT0
6
TS0SOC
Don’t care Selects the control of the timer output with software.
5 TS0STE Don’t care Enables or disables the control with the pattern
output trigger.
4 TS0POT Don’t care Selects the pattern output trigger.
Selects either the output pattern switching by the
external pattern input pin (TSG20PTSI0 to
TSG20PTSI2) or output switching by the TS0OPCI1
and TS0OPCI0 rising edge as the pattern output
trigger.
3 TS0PSS Don’t care Selects the pattern output order switching method.
The pattern output order is switched with TS0PSC.
2 TS0IDC Don’t care Selects the direction of the motor rotation.
1
TS0PSC
Don’t care Selects the order of the timer output pattern during
semi-automatic cruise control.
TS0OPT1
2 to 0
TS0SPC2 to
TS0SPC0
Don’t care Sets the timer output pattern in software output
function mode.
TS0CMP0 — — Don’t care Compare register
Sets the PWM period.
TS0CMP1W — — Don’t care Compare register
Sets a compare value.
TS0CMP5W — — Don’t care Compare register
Sets a compare value.
TS0CMP9W — — Don’t care Compare register
Sets a compare value.
TS0PAT0W — — Don’t care Pattern register
Sets the output pattern.
TS0PAT1W — — Don’t care Pattern register
Sets the output pattern.
TS0DTC0W — — Don’t care Dead time set register
Sets the dead time value.
TS0DTC1W — — Don’t care Dead time set register
Sets the dead time value.