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6 I/O Allocation
6-4
CP2E CPU Unit Software User’s Manual(W614)
Expansion Units and Expansion I/O Units connected to the CPU Unit are automatically allocated input
bits and output bits in words following those allocated to the CPU Unit.
For example, if a CPU Unit with 40 I/O points is used, CIO 0 and CIO 1 are allocated for inputs and CIO
100 and CIO 101 are allocated for outputs. Thus, words from CIO 2 onward for inputs and words from
CIO 102 onward for outputs are automatically allocated to the Expansion I/O Units and Expansion Units
in the order that the Units are connected.
There are Expansion I/O Units for expanding inputs, for expanding outputs, and for expanding both
input and outputs.
I/O bits starting from bit 00 in the next word after the word allocated to the previous Expansion Unit,
Expansion I/O Unit, or CPU Unit are automatically allocated. This word is indicated as “CIO m” for input
words and as “CIO n” for output words.
6-1-4 Allocations to Expansion Units and Expansion I/O Units
Allocations to Expansion I/O Units
Model
Input bits Output bits
No. of
bits
No. of
words
Addresses
No. of
bits
No. of
words
Addresses
8 -point Input Unit CP1W- 8 ED 8 1 CIO m, bits 00 to 07
−
None None
8 -point
Output Unit
Relay outputs CP1W- 8 ER
−
None None 8 1 CIO n, bits 00
to 07
Sinking transistor
outputs CP1W- 8 ET
Sourcing transis-
tor outputs CP1W- 8 ET1
16-point
Output Unit Relay outputs CP1W-16ER
−
None None 16 2 CIO n, bits 00
to 07
CIO n+1, bits
00 to 07
Sinking transistor
outputs CP1W-16ET
Sourcing transis-
tor outputs CP1W-16ET1
20-point
I/O Units Relay outputs CP1W-20EDR1 12 1 CIO m, bits 00 to 11 8 1 CIO n, bits 00
to 07
Sinking transistor
outputs CP1W-20EDT
Sourcing transis-
tor outputs CP1W-20EDT1
3 2-point
Output Unit
Relay outputs CP1W- 3 2ER
−
None None 3 2 4 CIO n, bits 00
to 07
CIO n+1, bits
00 to 07
CIO n+2, bits
00 to 07
CIO n+ 3 , bits
00 to 07
Sinking transistor
outputs CP1W- 3 2ET
Sourcing transis-
tor outputs CP1W- 3 2ET1
40-point
I/O Unit Relay outputs CP1W-40EDR 24 2 CIO m, bits 00 to 11
CIO m+1, bits 00 to
11
16 2 CIO n, bits 00
to 07
CIO n+1, bits
00 to 07
Sinking transistor
outputs CP1W-40EDT
Sourcing transis-
tor outputs CP1W-40EDT1