Omron SYSMAC CP Series, Руководство пользователя

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4-19
4 Understanding Programming
CP2E CPU Unit Software User’s Manual(W614)
4-4 Pr
o
g
ram
m
in
g In
struction
s
4
4-4-5 Specifying Dat
a in Oper
and
s
Note For Timer Completion Flags and Counter Completion Flags, there is no distinction between word addresses and bit
addresses.
Operand Description Example
Application
examples
Specifying
indirect DM
addresses in
Binary Mode An offset from the beginning of the DM Area
is specified. The contents of the address will
be treated as binary data (E
-type CPU
Unit 0000 to 4095, S -type CPU Unit
0000 to 8 191, N -type CPU Unit 0000 to
16 383 ) to specify the word address in DM
Area.
Add the @ symbol at the front to specify an
indirect address in Binary Mode.
MOV #0001 @D 3 00
Specifying
indirect DM
Addresses
in BCD
Mode An offset from the beginning of the DM Area
is specified. The contents of the address will
be treated as BCD data (E
-type CPU
Unit 0000 to 4095, S -type CPU Unit
0000 to 8 191, N -type CPU Unit 0000 to
16 383 ) to specify the word address in the
DM Area.
Add an asterisk (*) at the front to specify an
indirect address in BCD Mode.
MOV #0001 *D200
Operand Description Notation Application examples
Specifying a
register
directly
(See note.)
An index register (IR) or a data register (DR) is
specified directly by specifying IR
( : 0 to 15)
or DR ( : 0 to 15).
IR0 MOVR 1.02 IR0
Stores the PLC memory address for CIO
0010 in IR0.
IR1 MOVR 10 IR1
Stores the PLC memory address for CIO
0010 in IR1.
Specifying
an indirect
address
using a reg-
ister
(See note.)
Indirect
address
(No off-
set)
The bit or word with the PLC mem-
ory address contained in IR
will be
specified. Specify ,IR to specify
bits and words for instruction oper-
ands.
,IR0 LD ,IR0
Loads the bit with the PLC memory
address in IR0.
,IR1 MOV #0001 ,IR1
Stores #0001 in the word with the PLC
memory in IR1.
Constant
offset The bit or word with the PLC mem-
ory address in IR
+ or - the con-
stant is specified. S/-
constant ,IR
. Constant offsets
range from -204 8 to +2047 (deci-
mal).
The offset is converted to binary
data when the instruction is exe-
cuted.
+5,IR0 LD +5,IR0
Loads the bit with the PLC memory
address in IR0 + 5.
+ 3 1,IR1 MOV #0001 + 3 1,IR1
Stores #0001 in the word with the PLC
memory address in IR1 +
3 1.
DR offset The bit or word with the PLC mem-
ory address in IR
+ the contents of
DR is specified. Specify DR
,IR . DR (data register) contents
are treated as signed-binary data.
The contents of IR
will be given a
negative offset if the signed binary
value is negative.
DR0 ,IR0 LD DR0 ,IR0
Loads the bit with the PLC memory
address in IR0 + the value in DR0.
DR0 ,IR1 MOV #0001 DR0 ,IR1
Stores #0001 in the word with the PLC
memory address in IR1 + the value in DR0.
@D300
Add @
&256 decimal
(#0100 hexadecimal)
Specify D00256
Contents
Contents
Specify D100
* D200
Add *
#0100