Omron SYSMAC CP Series, Руководство пользователя

Страница: 176 / 578

11 High-speed Counters
11-6
CP2E CPU Unit Software User’s Manual(W614)
z
Wiring Example for High-speed Counter Input Terminals
Using a 24-VDC Open-collector Encoder
The following example shows the connections of an encoder with phase-A, phase-B, and phase-Z
inputs to high-speed counter 0.
Writing the Ladder Program
Execution Program Reference
Generating interrupts for the
high-speed counter PV (num-
ber of pulses) and perform
high-speed processing. Specify interrupt tasks with CTBL
instructions. 11- 3 High- s peed
Counter Interrupt s
Reading the high-speed
counter PV (number of
pulses). Read the high-speed counter PV from
the Auxiliary Area and convert it to
position or length data using instruc-
tions or measure the length using con-
mparison instructions such as =, >,
and <. 11-2-4 Reading the
Pre
s ent Value
Reading the high-speed
counter frequency (speed). Execute a PRV instruction. 11-2-5 Frequency
Mea
s urement
0V
+24V
0.00
0.01
0.04
COM (COM 24V)
0.00
0.01
0.04
COM
0V
24V
0V
I
A
I
B
I
Z
Encoder
(power su pply: 24 VDC)
Ex a mple: E6B2-CWZ6C
NPN open-collector o u tp u t
Bl a ck Ph
as e A
White Ph
as e B
Or a nge Ph
as e Z
Brown+Vcc
Bl u e 0V(COM)
24 VDC power su pply
CP2E CPU Unit
(Differenti a l Ph as e Inp u t Mode)
(High- s peed co u nter 0: Ph as e A 0 V)
(High- s peed co u nter 0: Ph as e B 0 V)
(High- s peed co u nter 0: Ph as e Z 0 V)
Power provided
Encoder
(Do not us e the sa me I/O power su pply as other e qu ipment.)
Power su pply
S hielded twi s ted-p a ir c ab le
CP2E CPU Unit
Ph as e A
Ph as e B
Ph as e Z