Transfer Control Instructions
5-33
DC
Data Compare Value
[7:0]
This 8-bit field is the data compared against the
register. These bits are used
in conjunction with the Data Compare Mask Field to test
for a particular data value. If the COM bit (
, bit 0) is cleared, the value in the SFBR register
may not be stable. In this case, do not use instructions
using this data compare value.
5.5.2 Second Dword
Figure 5.10 Transfer Control Instructions - Second Dword
Jump Address
[31:0]
This 32-bit field contains the address of the next
instruction to fetch when a jump is taken. Once the
LSI53C896 fetches the instruction from the address
pointed to by these 32 bits, this address is incremented
by 4, loaded into the
register and becomes the current instruction pointer.
5.5.3 Third Dword
Figure 5.11 Transfer Control Instructions - Third Dword
JUMP64 Address
[31:0]
This 32-bit field contains the upper Dword of a 64-bit
address of the next instruction to fetch when a JUMP64
is taken.
31
0
DSPS Register
31
0
SFS Register (Used for JUMP64 Instruction)
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...