SCSI Registers
4-89
HTHSF
Handshake-to-Handshake Timer Scale Factor
4
Setting this bit causes this timer to shift by a factor of 16.
Refer to the
register
description for details.
GEN[3:0]
General Purpose Timer Period
[3:0]
These bits select the period of the general purpose timer.
The time measured is the time between enabling and
disabling of the timer. When this timing is exceeded, the
GEN bit in the
SCSI Interrupt Status One (SIST1)
register
is set. Refer to the table under
, bits [3:0], for the available time-out periods.
HTH[7:4], SEL[3:0],
GEN[3:0]
1
Minimum Time-out
(50 MHz Clock)
2
HTHSF = 0,
GENSF = 0
HTHSF = 1,
GENSF = 1
0000
Disabled
Disabled
0001
100
µ
s
1.6 ms
0010
200
µ
s
3.2 ms
0011
400
µ
s
6.4 ms
0100
800
µ
s
12.8 ms
0101
1.6 ms
25.6 ms
0110
3.2 ms
51.2 ms
0111
6.4 ms
102.4 ms
1000
12.8 ms
204.8 ms
1001
25.6 ms
409.6 ms
1010
51.2 ms
819.2 ms
1011
102.4 ms
1.6 s
1100
204.8 ms
3.2 s
1101
409.6 ms
6.4 s
1110
819.2 ms
12.8 s
1111
1.6 s
25.6 s
1. These values will be correct if the CCF bits in the
register are set according to the
valid combinations in the bit description.
2. 50 MHz clock is not supported for Ultra2 SCSI operation.
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...