LSI LSI53C896, Technical Manual

Page: 183 / 370

SCSI Registers 4-71
and executing SCSI SCRIPTS when the DMA SCRIPTS
Pointer (DSP) register is written. This bit normally is not
used for SCSI SCRIPTS operations.
Register: 0x39
DMA Interrupt Enable (DIEN)
Read/Write
R Reserved 7
MDPE Master Data Parity Error 6
BF Bus Fault 5
ABRT Aborted 4
SSI Single Step Interrupt 3
SIR SCRIPTS Interrupt Instruction Received 2
R Reserved 1
IID Illegal Instruction Detected 0
This register contains the interrupt mask bits corresponding to the
interrupting conditions described in the
DMA Status (DSTAT) register. An
interrupt is masked by clearing the appropriate mask bit. Masking an
interrupt prevents INTA/ (for Function A) or INTB/ (for Function B) from
being asserted for the corresponding interrupt, but the status bit is still
set in the
DMA Status (DSTAT) register. Masking an interrupt does not
prevent setting the Interrupt Status Zero (ISTAT0) DIP. All DMA interrupts
are considered fatal, therefore SCRIPTS stops running when this
condition occurs, whether or not the interrupt is masked. Setting a mask
bit enables the assertion of INTA/, or INTB/, for the corresponding
interrupt. (A masked nonfatal interrupt does not prevent unmasked or
fatal interrupts from getting through; interrupt stacking begins when either
the
Interrupt Status Zero (ISTAT0) SIP or DIP bit is set.)
7 6 5 4 3 2 1 0
R MDPE BF ABRT SSI SIR R IID
x 0 0 0 0 0 x 0
*