LSI LSI53C896, Technical Manual

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I/O Instructions 5-21
the first four bytes of the SCRIPTS instruction is added
to the data structure base address to form the fetch
address.
Sel Select with ATN/ 24
This bit specifies whether SATN/ is asserted during the
selection phase when the LSI53C896 is executing a
Select instruction. When operating in the initiator mode,
set this bit for the Select instruction. If this bit is set on
any other I/O instruction, an illegal instruction interrupt is
generated.
R Reserved [23:20]
ENDID[3:0] Encoded SCSI Destination ID [19:16]
This 4-bit field specifies the destination SCSI ID for an I/O
instruction.
R Reserved [15:11]
CA Set/Clear Carry 10
This bit is used in conjunction with a Set or Clear
instruction to set or clear the Carry bit. Setting this bit
with a Set instruction asserts the Carry bit in the ALU.
Clearing this bit with a Clear instruction deasserts the
Carry bit in the ALU.
TM Set/Clear Target Mode 9
This bit is used in conjunction with a Set or Clear
instruction to set or clear the target mode. Setting this bit
with a Set instruction configures the LSI53C896 as a
target device (this sets bit 0 of the
SCSI Control Zero
(SCNTL0) register). Clearing this bit with a Clear
instruction configures the LSI53C896 as an initiator
device (this clears bit 0 of the SCNTL0 register).
R Reserved [8:7]
A Set/Clear SACK/ 6
R Reserved [5:4]
Command Table Offset
Absolute Jump Offset
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