Transfer Control Instructions
5-27
5.5.1 First Dword
Figure 5.9
Transfer Control Instructions - First Dword
IT[1:0]
Instruction Type - Transfer Control
Instruction
[31:30]
OPC[2:0]
Opcode
[29:27]
This 3-bit field specifies the type of transfer control
instruction to execute. All transfer control instructions can
be conditional. They can be dependent on a true/false
comparison of the ALU Carry bit or a comparison of the
SCSI information transfer phase with the Phase field,
and/or a comparison of the First Byte Received with the
Data Compare field. Each instruction can operate in the
initiator or target mode.
Jump Instruction
The LSI53C896 can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare and
True/False bit fields. If the comparisons are true, then it
loads the
register with the
contents of the
DMA SCRIPTS Pointer Save (DSPS)
register. The DSP register now contains the address of
the next instruction.
If the comparisons are false, the LSI53C896 fetches the
next instruction from the address pointed to by the
register, leaving the instruction
pointer unchanged.
31 30 29
27 26
24
23 22
21
20 19
18
17 16 15
8
7
0
DCMD Register
DBC Register
IT[1:0] OPC[2:0] SCSIP[2:0]
RA
J
CT
IF TF CD CP VP
MC
DC
OPC2
OPC1
OPC0
Instruction Defined
0
0
0
Jump
0
0
1
Call
0
1
0
Return
0
1
1
Interrupt
1
x
x
Reserved
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...